The Sierpińki network S(p, q) is a hierarchical, self-similar structure with broad applications in multiprocessor interconnection and VLSI design. In this work, we study its enhanced variant, S++ (p, q) for p ≥ 2, q ≥ 3, focusing on the problem of minimum wirelength embedding into windmill and necklace graphs. These results offer practical advances for hierarchical network layout, contributing to the design of scalable and low-latency parallel computing architectures.